Engineer & Entrepreneur
Hi, I'm Raj. I work where AI silicon and quantum hardware meet.
By day I'm a product engineer at Cerebras, bringing up wafer-scale AI systems — the largest chips anyone builds. By night I'm a master's researcher at Waterloo, making superconducting quantum circuits that tolerate the messiness of real fabrication, and decoders fast enough to keep up with them.
Before that: six years at Apple validating silicon for Macs and iPhones, and a stint at NVIDIA characterizing Turing. I've spent my career on the unglamorous layer where new computing actually gets born.
Now Product Engineer,
Cerebras Systems
Cerebras Systems
Research M.A.Sc., Quantum
Information — Waterloo
Information — Waterloo
Interests Decoder acceleration,
fab-aware design
fab-aware design
Selected work All projects →
Fabrication-aware optimization toolchain Monte Carlo search for superconducting circuit parameters that survive real fabrication variance, with GDS layout generation downstream. Tiered quantum error-correction decoder A decoder architecture that trades accuracy for latency in tiers, shaped for hardware acceleration rather than a paper benchmark. Wafer-scale bringup & characterization flow Python tooling to bring up, program, and characterize the Wafer Scale Engine, plus heater-mode support for whole-system stress testing. Recent writing All posts →
Jul 2026 What wafer-scale taught me about qubit yield Get in touch
r42shah@gmail.com Working on decoder hardware, quantum control electronics, or wafer-scale systems? I'd like to hear about it.